Saturday, May 30, 2026

Update to the matrix multiplication example.

 Wow!  It's been 16 years since I did that and I haven't done much with ColorForth since. But some new developments have peaked my interest again.  One is the explosion of artificial intelligence and it's enormous energy requirements.  The GA144 has long been touted for its efficiency.  The other is that GreenArrays recently announced a new partnership with AI startup Volatco which has developed its own 2 GA144 board with 2 MB of SRAM and 32 MB SPI flash.  By contrast the GreenArrays eval board comes with 1 MB of SRAM and 1 MB flash.  The GA board has USB build in which the Voltaco board lacks and is considerably larger.  Hopefully the Voltaco will come in as a lower price point.

 


 GreenArrays Inc has ended support for ColorForth and is now using a version of polyForth for development. However ColorForth is available for download.  The latest version of ColorForth doesn't work with my original code as some of the default boot code for the F18 cores changed.  After having Claude.ai help me work through the documentation, I got the code working again.  In the process I better learned how this all worked.  Here is the updated code which I put in blocks 798 to 804.  Note that block 200 is the "loader" block used to tell softsim to load which blocks into which nodes and block 216 is the "config" block that sets the initial states for each node. By default the program counter is set to xA9 which does a multi-port read.  For this example all three nodes start at address 0 and that is set by 0 /p.

 

 


multicore matrix multiplication example,
a 2 row by 8 col matrix is multiplied by,
a 2 col by 8 row matrix cr
resulting in a vector r1*c1 r1*c2 r2*c1 r2*c2,
cr
r1out send vector r1 to right node cr
r2out sent vector r2 to down node cr
c1,c2out send vectors c1,c2 to right indent
  
and down nodes cr
getres get results from rt and dwn nodes cr
note 0 org means the code is compiled to that
address                                       

   798 list
0 org r2out right b! 7 for @p !b unext cr
1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , cr
r2out down b! 7 for @p !b unext cr
9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 , cr
rd-- b! 0 !b c1,c2out 15 for @p !b unext cr
17 , 18 , 19 , 20 , 21 , 22 , 23 , 24 , cr
25 , 26 , 27 , 28 , 29 , 30 , 31 , 32 , cr
getres right b! @b @b down b! @b @b r---      


helper functions for worker nodes
getvector
gets vector from manager node
*
ab-a*b 17 bit multiply
.prod
a-n get vector and do dotproduct with,
vector stored at a
r*c1,c2
p- read r from port p then read c1 and
c2 and do dot products with r. return results
to port p                                     

   800 list
getrow a! 7 for @b !+ unext ;
*
a! dup dup or 17 push . begin +* unext drop
drop a ;

.prod
a! dup dup or 7 for @b @+ a push * + pop
a! next ;

r*c1,c2
b! 60 getrow @b drop 60 .prod 60 .prod
!b !b ;                                       


code for right worker node                    

   802 list
4 org 800 load 0 org left r*c1,c2 r---        


code for down worker node                     

   804 list
4 org 800 load 0 org up r*c1,c2 r---          


use this load block to compile your code cr
for the f18 computers. br

as delivered, sample code loaded here is pro-
vided to facilitate working with examples
cr
presented in the user's guide. it may be cr
deleted if you no longer have use for it.     

   200 list
user f18 code reclaim 716 node 798 load 717 no
de
802 load 616 node 804 load br

softsim example reclaim 0 node 1342 load cr
practical example pwm code reclaim 842 load br

sha256 reclaim 900 5 loads,
greg n1 object 950 load,
mangpo test 894 load,
an012 sensortag 960 load,
,
hardsim pwr verify 882 load,
random 884 load                               


this block is loaded by softsim to set the,
configuration for a given simulation. edit it
as needed to set up testbeds, load application
code and initialize it for running, and set
,
breakpoints.,
,
see arrayforth user's manual for information,
about these options.                          

   216 list
softsim configuration,
,
spi boot testbed 1244 2 loads,
sync boot testbed 'addr,len' 1230 load,
,
smtm 0 +node 0 /ram 0 /p,
/command test 400 +node 0 /ram 25 /a 12 /b,
9 8 7 6 5 4 3 2 1 12345 10 /stack A9 /p,
,
rom write test 200 +node 13 /p,
,
0 32 103 break,
0 BE 300 break,
616 +node 0 /p 716 +node 0 /p 717 +node 0 /p  

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